The present invention relates to component array packaging. Specifically, the present invention relates to a frame packaged array electronic or optical component and method of making.
The present invention will be shown and described for use with electronics, however, it can also be used with optic devices.
As electronic devices, such as cardiac care devices, continue to increase in functionality while the device sizes are reduced, reductions in circuit board real estate is desired. Low voltage multi-layer ceramic capacitors are currently used extensively in medical and other electronic equipment for filtering applications. Miniaturization of the components for some filter designs require two or more capacitors with very closely matched capacitance. For this reason, arrays containing two or more matched capacitors that can be placed on a printed circuit or PC board in a single operation have been used.
Capacitor arrays having two or more capacitors within a single monolithic multilayer ceramic component are available. The capacitors within such components have terminations that connect to separate sets of interleaved inner electrodes within the device. When these components are placed in a circuit board, the single array behaves like two or more individual multi-layer ceramic capacitors placed side by side. Other electronic devices have similar types of arrays.
Arrays have the advantages of replacing two or more standard multilayer capacitors with one component that can be placed on a PC board in a single operation, rather than one operation for each part. In addition, the area required on a PC board for an array is less than that for individual multilayer ceramic capacitors. This is an advantage for applications where space is at a premium.
As technology advances and there is a requirement to reduce the size of the array, there is a serious disadvantage to this approach. As the proximity of the electrodes of two or more capacitors within an array get closer together as the part size is reduced, the electric fields in the two separate capacitors can interact through the mutual ceramic interface resulting in crosstalk detrimental to the performance of the circuit. Additionally, it is not easy to test the individual capacitors within the array without developing special test equipment. Another problem with this type of array is that since this is a single monolith, the array is restricted to one ceramic dielectric type. Furthermore, if one capacitor in the array is defective, the entire array is defective.
U.S. Pat. No. 6,058,004 discloses a method of epoxy bonding two or more multilayer ceramic capacitors together with a resistor or inductor into a single component. In this way there is no single material forming a direct link between the electrodes of the capacitors or other components so crosstalk is minimized. This method has the advantage that the individual standard type components can be tested prior to assembly of the array and unlike the monolithic approach, the arrays can be formed with components of widely different materials and sizes. Arrays of multi-layer ceramic capacitors small as 0603 case size (length=0.063+/−0.005″; width=0.031+/−0.005″) have been used to form Epoxy Bonded Arrays in this way. However, there are also significant limitations to this approach with respect to further size reductions to realize further area reductions in circuit designs, specifically it is difficult to maintain the spacing tolerances and alignment of the capacitors during the placement operation. Therefore, it is desirable to have an improved frame packaged array electronic component which can accommodate smaller electronic components.
In view of the foregoing, it is a primary feature or advantage of the present invention to provide an improved frame packaged array electronic component.
Another feature or advantage of the present invention is a reduced size electronic component array, in terms of smaller surface area, and/or lower head room.
Another feature or advantage of the present invention is an electronic component array system which can be tested using traditional testing methods for the electronic components.
Another feature or advantage of the present invention is an electronic array having multiple electronic components which can be placed on a circuit board in a single action.
Another feature or advantage of the present invention is an electronic component array device which can withstand the high temperatures of surface mounting electronic components to a circuit board.
Another feature or advantage of the present invention is an electronic frame packaged array device which can form an electronics array using different types of electronics components in the same array.
Another feature or advantage of the present invention is an electronics array device which allows for uniform or controlled spacing between electronics components in the array.
A further feature or advantage of the present invention is an electronics array device which gives rigidity to multiple electronics components contained within the array.
A further feature or advantage of the present invention is the provision of a frame packaged array electronic component which is economical to manufacture, durable in use, and efficient in operation.
A still further feature or advantage or advantage of the present invention is a frame packaged array electronic component method of manufacturing and assembling the electronic component array.
One or more of these and/or other objects, features or advantages of the invention will be apparent from the specification and claims that follow.